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1 zarlink semiconductor inc. features ? extremely fast turn-on very small size and very low leakage 5, 6 and 7 terminals available standard delivery form: solder bumped die facilitates compliance with en-45502 and en- 50061 superior quality qa procedures based on mil-prf-38535 traceability for every chip to lot and wafer number 100% burn-in capability applications pacemakers, implantable cardioverter defibrillators (icds), neurostimulators, bladder control devices medical devices with electronics requiring protection against a high voltage surge description the ZL70002/08/09/10 family are high performance surge protection devices targeted for medical applications. july 2003 ordering information ZL70002/udj bumped die, waffle tray zl70008/udj bumped die, waffle tray zl70009/udj bumped die, waffle tray zl70010/udj bumped die, waffle tray 0 to +55 c ZL70002/08/09/10 medical surge protection devices data sheet figure 1 - zl70010 block diagram rb t1 rb t2 rb t3 rb t4 rb t5 rb t6
ZL70002/08/09/10 data sheet 2 zarlink semiconductor inc. figure 2 - ZL70002 block diagram pin description table - zl70010 and ZL70002 figure 3 - zl70010 and ZL70002 bumped chip appearance pin # in/output name description 1 i t1 transient surge protection terminal 1 2 i t2 transient surge protection terminal 2 3 i t3 transient surge protection terminal 3 4 i t4 transient surge protection terminal 4 5 i t5 transient surge protection terminal 5 6 i t6 transient surge protection terminal 6 7 i t7 transient surge protection terminal 7 (ZL70002 only) rb t1 rb t2 rb t3 rb t4 rb t5 rb t6 rb t7 zl70010 ZL70002 t1 t2 t3 t4 t5 t6 t1 t2 t3 t4 t5 t6 t7
data sheet ZL70002/08/09/10 3 zarlink semiconductor inc. figure 4 - zl0008/zl0009 block diagram figure 5 - zl70008 and zl70009 bumped chip appearance pin description table - zl0008 and zl0009 pin # in/output name description 1 i t1 transient surge protection terminal 1 2 i t2 transient surge protection terminal 2 3 i/o sub1 transient surge protection substrate connection 1 4 i t3 transient surge protection terminal 3 doubled area 5 i/o sub2 transient surge protection substrate connection 2 6 i t4 transient surge protection terminal 4 7 i t5 transient surge protection terminal 5 rb t1 sub1 sub2 rb t2 rb t3 rb t4 rb t5 zl70008 zl70009 t1 t2 t3 t4 t5 sub1 sub2 t1 t2 t3 t4 t5 sub1 sub2
ZL70002/08/09/10 data sheet 4 zarlink semiconductor inc. 1.0 functional description the ZL70002/08/09/10 is a family of transient surge suppressing devices designed specifically for implanted medical devices. the device terminals have an extremely low leakage during normal voltages and can therefore be connected in parallel with the pins of the device it protects. when the voltage rises to dangerous level it then rapidly turns on and limits the voltage by shunting the current through its thyristors. this makes the ZL70002/08/09/10 family an effective means of compliance with international regulations en-45502, ?active implantable? and the en- 50061 ?safety of implantable cardiac pacemakers?. 1.1 zl70010 zl70010 is a six-branch device.the suppression is achieved by a self-triggering thyristor-diode device in parallel with a diode between each branch-input and a common node which also is the substrate of the device. the six branches of the device are reached through terminals t1, t2, t3, t4, t5 and t6. the electrical characteristic observed between any two of the terminals (t1, t2, t3, t4, t5 and t6) very much resembles that of a diac, see figure 12. when a transient current is forced between two branch-input terminals, the positive terminal will be clamped to the common node by the diode of one branch and the negative terminal to the forward voltage of the thyristor-diode of the other branch. due to the low on-state voltage of the thyristor that voltage will stay at a safe value during the transient. 1.2 ZL70002 ZL70002 is a seven-branch device with exactly the same electrical characteristics as zl70010. 1.3 zl70008 and zl70009 zl70008 and zl70009 are five-branch transient surge suppressing with the same functionality as zl70010. the only functional difference is that the substrate of the device is accessible through the two terminals sub1 and sub2.
data sheet ZL70002/08/09/10 5 zarlink semiconductor inc. 2.0 application according to the en-45502 standard, all active medical devices intended for implantation in a human torso should not be permanently affected by an external defibrillation of the patient. compliance is confirmed if the implanted device continues to meet device specification after being subjected to a sequence of 140 volt pulses in series with a 300 ohm resistor between each conductive part of the device including the device case (see en-45502 for details). using the ZL70002/08/09/10 protects the implantable device and is an effective means of compliance with the en-45502 standard where the electronics, in almost all cases, would be destroyed if not protected. the same compliance tests are also described in en-50061. in the application example shown in figure 6, each of the dual chamber pacemaker's terminals and case are connected to a terminal on the protection device. if a defibrillation pulse causes the ventricular tip to begin to go positive, relative to the case, the zl70008/9 thyristor structure rapidly becomes active and forms a low impedance path between t2 and t3 to absorb the current and limit the voltage. this provides an effective means of protection to the pacemaker chip. in actuality, the voltages and currents the implanted device is subjected to in an actual defibrillation can be higher than described in en-45502/en-50061 and has been taken into account when designing the ZL70002/08/09/10 family. figure 6 - pacemaker application example terminals placed most remotely to others should get special attention since they effectively form a large pick-up coil and could therefore be exposed to a large amount of current. when implanted, the pacemaker case is placed beneath the collarbone and all other terminals are placed together inside the heart. for this reason, the largest current will pass through the surge protection terminal connected to the case of the pacemaker. for zl70008/9, we recommend that the case be connected to t3 of the protection device which is designed to be able to withstand the largest amount of current. if device zl700010 is used in a 5 terminal application, we recommend that 2 pins of the protection device be connected to the implantable device terminal with the largest current flow (typically the terminal for the device case). analog chip t1 t2 t3 t4 t5 atrial tip lead atrial ring lead case ventricular tip lead ventricular ring lead typical dual chamber pacemaker surge protection device zl70008/09 stimulation and block charge pump voltage and current reference digital chip sensing
ZL70002/08/09/10 data sheet 6 zarlink semiconductor inc. 2.1 mechanical data - zl70010 figure 7 - size and bump placement of zl70010 2.2 mechanical data - ZL70002 figure 8 - size and bump placement of ZL70002 4064 + 20 um 1840 + 20 um 1290 + 5 um 270 + 25 um 108 + 5 um 650 + 5 um 528 + 18 um 185 + 5 um 300 + 25 um 650 + 5 um 528 + 18 um 185 + 5 um 300 + 25 um 4700 + 20 um 1290 + 5 um 270 + 25 um 108 + 5 um 1850 + 20 um
data sheet ZL70002/08/09/10 7 zarlink semiconductor inc. 2.3 mechanical data - zl70008 and zl70009 note that the bump pattern for zl70008 and zl70009 differ slightly as shown in figure 5. figure 9 depicts zl70008. figure 9 - size and bump placement of zl70008 and zl70009 figure 10 - bump appearance of ZL70002/08/09/10 4454 + 20 um 342 + 5 um 516 + 5 um 559 + 5 um 186 + 5 um 372 + 35 um 235 + 35 um 2285 + 5 um 1290 + 5 um 108 + 5 um sn/pb 63/37 al si3n4 barrier layers o 92 um 95 + 25/-20 um o 125 + 22 um o 66 um
ZL70002/08/09/10 data sheet 8 zarlink semiconductor inc. absolute maximum ratings* *exceeding these values may cause permanent damage. functional operations under these conditions is not implemented recommended operating conditions 1) typical figures are at 37 degrees c and are for design only. dc electrical characteristics 1 parameter sym min max units test conditions 1 storage temperature range t s -40 125 c 2 maximum junction temperature t j 125 c 3 maximum surge current itsm 8 a test according to figure 11. tp for flip mounted chips with underfill: 10 ms 4 continuous power dissipation pmax 300 mw t>1 s parameter sym min typ 1 max units test conditions 5 operating temperature range t op 0 3755c parameter sym min typ 2 max units test conditions 6 forward breakdown voltage, zener diode, terminal to terminal ZL70002/10 vfz 9.0 10.1 11.0 v iz=10 a zl70008 vfz 9.5 10.5 13.5 v iz=10 a zl70009 vfz 9.0 9.5 12.2 v iz=10 a 7 forward breakdown voltage, zener diode, terminal to substrate zl70008 vfz 9.0 10.2 12.8 v iz=10 a zl70009 vfz 8.5 9.2 11.5 v iz=10 a 8 breakover voltage, terminal to terminal ZL70002/10 vbo 9.0 11.2 12.2 v figure 12 zl70008 vbo 9.5 11.6 13.5 v figure 12 zl70009 vbo 9.0 10.5 12.2 v figure 12 9 breakover voltage, terminal to substrate zl70008 vbo 9.0 11.0 12.8 v figure 12 zl70009 vbo 8.5 9.8 11.5 v figure 12
data sheet ZL70002/08/09/10 9 zarlink semiconductor inc. 1) electrical characteristics are over recommended operating conditions unless otherwise stated. 2) typical figures are at 37 degrees c and are for design only 10 forward diode voltage drop, substrate to terminal zl70008/09 vfwd 2 v measured @2a 11 breakover current ZL70002/10 ibo 15 60 ma figure 12 zl70008 ibo 28 60 ma figure 12 zl70009 ibo 15 40 ma figure 12 12 holding current ZL70002/08/09/10 ih 1 ma measured after a current pulse of ip=0.2a for tp=1ms, rg<200 ? figure 13. 13 on-state voltage terminal to terminal ZL70002/08/09/10 von 2.2 3.0 v measured with a 300 s pulse, it=1 a 14 on-state dynamic resistance ZL70002/08/09/10 ron 0.4 1 ? measured with a 300 s pulse, dit=1-2 a 15 on-state voltage terminal to substrate zl70008/09 von 1.0 3.0 v measured with a 300 s pulse, it=1 a 16 off-state current terminal to terminal ZL70002/08/09/10 id 10 100 na measured at 8.5 v (ZL70002/09/10) and at 9.0 v (zl70008) 17 off-state current terminal to substrate zl70008/09 id 10 100 na measured at 8.5 v (zl70008) and at 8.0 v (zl70009) 18 parasitic capacitance ZL70002/10 cp 50 pf 19 parasitic capacitance zl70008/09 cp 200 pf parameter sym min typ 2 max units test conditions
ZL70002/08/09/10 data sheet 10 zarlink semiconductor inc. ac electrical characteristics 1 1) electrical characteristics are over recommended operating conditions unless otherwise stated. 2) typical figures are at 37 degrees c and are for design only. figure 11 - 10 ms surge current waveform figure 12 - terminal to terminal characteristic parameter sym min typ 2 max units test conditions 20 turn-on delay ZL70002/10 t ond 500 700 ns measured at 8.0 v (ZL70002/09/10) and at 8.5 v (zl70008) and defined according to figure 14. zl70008 t ond 140 200 ns zl70009 t ond 60 100 ns 21 maximum voltage during surge ZL70002/08/10 vpeak 13 15 v measured at peak and defined according to figure 14. zl70009 vpeak 11 13 v measured at peak and defined according to figure 14. itsm 0.9xitsm 0.1xitsm slewrate= 4 a/ s t i tp v bo u i it vo n vd vfz id ifz ibo ih
data sheet ZL70002/08/09/10 11 zarlink semiconductor inc. figure 13 - holding current circuit figure 14 - turn-on delay definition + - vg rg dut ip vfz min t t ond v t ip= 4 a 1v di/dt = 4a/us vpeak
www.zarlink.com information relating to products and services furnished herein by zarlink semiconductor inc. or its subsidiaries (collectively ?zarlink?) is believed to be reliable. however, zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from t he application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. neither the supply of such information or purchase of product or service conveys any license, either express or implied, u nder patents or other intellectual property rights owned by zarlink or licensed from third parties by zarlink, whatsoever. purchasers of products are also hereby notified that the use of product in certain ways or in combination with zarlink, or non-zarlink furnished goods or services may infringe patents or other intellect ual property rights owned by zarlink. this publication is issued to provide information only and (unless agreed by zarlink in writing) may not be used, applied or re produced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. the products, t heir specifications, services and other information appearing in this publication are subject to change by zarlink without notice. no warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. it is the user?s responsibility t o fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not b een superseded. manufacturing does not necessarily include testing of all functions or parameters. these products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. all products and materials are sold and services provided subject to zarlink?s conditi ons of sale which are available on request. purchase of zarlink?s i 2 c components conveys a licence under the philips i 2 c patent rights to use these components in and i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. zarlink, zl and the zarlink semiconductor logo are trademarks of zarlink semiconductor inc. copyright zarlink semiconductor inc. all rights reserved. technical documentation - not for resale for more information about all zarlink products visit our web site at

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